1. Field of the Invention
The present invention relates to an apparatus and method for improving read endurance of non-volatile memory, and more particularly, to an apparatus and method for improving read endurance of non-volatile memory by increasing a write voltage and/or a read voltage in a system on chip (SOC) including the non-volatile memory.
2. Description of Related Art
Non-volatile memory cells, and particularly electrically erasable programmable read-only memory (EEPROM) cells, have a read endurance of less than 500,000 write/read cycles or updates. The read endurance is the ability of an EEPROM cell to maintain a write/read time or speed within a predetermined range when data is written to or read from the EEPROM cell. When a threshold voltage of the EEPROM cell decreases, current flowing in the EEPROM cell increases. As the current flowing in the EEPROM cell increases, time taken to read data from the EEPROM cell increases and read speed decreases. The number of updates performed before the read speed decreases outside the predetermined range may be expressed as the read endurance.
FIG. 1 illustrates the number of updates versus the threshold voltage in an EEPROM cell. Referring to FIG. 1, when the number of updates, or read/write cycles, in the EEPROM cell increases in a program state, the threshold voltage of the EEPROM cell increases. As the threshold voltage of the EEPROM cell increases, current in the EEPROM cell occurring when data stored in the EEPROM cell is read decreases.
Accordingly, as the EEPROM cell is repeatedly updated, read time increases and read speed decreases.
Therefore, a need exists for an apparatus and method for improving read endurance of non-volatile memory.